1. Field of the Invention
The present invention generally relates to video display systems. More particularly, the present invention relates to filtering pixel data in a video display system. More particularly still, the invention relates to an improved vertical filter that filters pixel data stored in an interleaved format in a memory buffer.
2. Background of the Invention
The consumer electronics industry has experienced a dramatic explosion in product development over the last 20 years. This explosion has been fueled by consumer demand coupled with significant advances in semiconductor technology that have lead to lower cost semiconductor devices incorporating significantly more functionality than previously possible. For example, a hand-held calculator from 20 years ago provided the ability to perform rudimentary mathematical operations. Today, a hand-held device can provide much of the functionality of a desktop computer system.
The visual display of information to the user is of particular importance to the consumer electronics industry. The most notable examples of visual displays include televisions and personal computers. Other types of consumer electronics, including stereo receivers and handheld computers, also include visual displays. FIG. 1, for example, shows a typical video monitor 20 such as may be used in television or personal computer systems. As shown, the display includes a grid of pixels 22, each pixel represented by an "X." A typical television pixel format includes 480 rows, or lines, of pixels arranged in 720 columns of pixels for a total of 345,600 pixels.
Each pixel depicted in FIG. 1 is represented by one or more data values. For example, each pixel can be represented in a "RGB" format comprising red, green, and blue color components. Often, each red, green, and blue component is represented by an eight-bit value, thus requiring 24 bits to represent the entire RGB pixel value. Alternatively, each pixel can be represented in a "YUV" or "YCrCb" format. In either the YUV or YCrCb formats, the "Y" value represents luminance ("luma") which determines the brightness of the pixel. The U and V values represent chrominance ("chroma") components which determine color and are calculated as the difference between the luminance components and the red and blue color values; that is, U=Y-R and V=Y-B. The Cr and Cb values also represent chrominance and are scaled versions of the U and V chrominance values.
The image displayed on a television monitor in each instance of time thus includes approximately 350,000 pixels of information with each pixel represented by 24 bits (i.e., three bytes) of RGB or YCrCb values before conversion to be a format compatible with the television (such as the NTSC signal format). In a television format, 30 frames of video are shown on the screen each second. Because of the extraordinary volume of data represented by moving pictures, compression and encoding techniques are important for the transmission and storage of video. Once such compression technique is implemented by the MPEG standard ("Moving Pictures Experts Group"). MPEG is a technique for compressing and encoding video and audio data for storage on a storage medium, transmission via a satellite, or other situations in which it would be desirable to reduce the size of the video and audio information.
The MPEG standard represents a set of methods for compression/encoding and decompression/decoding of full motion video images. MPEG compression uses both motion compensation and discrete cosine transform ("DCT") processes, among others, to yield relatively high compression ratios. The YCrCb format for representing pixel color is the format specified by the MPEG standard.
The two predominant MPEG standards are referred to as MPEG-1 and MPEG-2. The MPEG-1 standard generally concerns inter-field data reduction using block-based motion and compensation prediction ("MCP"), which generally uses temporal differential pulse code modulation ("DPCM"). The MPEG-2 standard is similar to the MPEG-1 standard, but includes extensions to cover a wider range of applications, including interlaced digital video, such as high definition television ("HDTV").
The MPEG format thus specifies various techniques for compressing motion video images. To display those images on a television or computer screen, the compressed images must be decompressed and then decoded and further processed. The processing steps required after the images are decoded include one or more filtering steps. Video processing systems, such as, for example, digital video disk (DVD) systems, usually include both horizontal and vertical filters. Horizontal filters process pixel data across a horizontal row of pixels. Vertical filters process pixel data along a vertical column of pixels.
It is often desirable to horizontally and vertically filter video data to change a video image from one "aspect ratio" to another aspect ratio. The aspect ratio refers to the ratio of the number of columns of pixels to the number of rows of pixels. Thus, for example, the aspect ratio of the display illustrated in FIG. 1 is 720/480, alternatively stated as 4:3. The 4:3 aspect ratio is standard for the television format. Films to be shown in movie theaters, however, typically are recorded using a 16:9 (i.e., 720 by 360 pixels) aspect ratio. Because of the difference in aspect ratios between the way a film is originally recorded and stored digitally and the aspect ratio of television monitors, it is desirable to convert MPEG video from one aspect ratio to another when showing a 16:9 aspect ratio film on a 4:3 aspect ratio monitor. This conversion process generally requires vertical filtering to convert 360 lines of video to 480 lines, or vice versa. There are numerous other situations in which vertical filtering is required.
Vertical filtering generally requires combining or otherwise processing one line of pixel values with one or more other lines of pixel values. It is often desirable, particularly with respect to the luma component of each pixel to which the human eye is more sensitive, to vertically filter four lines of pixel data at a time to reduce the vertical size of a video image. Referring now to FIG. 2, in conventional video processing systems, such as those implemented in DVD drives, the filtering components for processing four lines of pixel data at a time generally include four line buffers (line buffers 1-4) and a filter. Each line buffer includes sufficient memory capacity to store all of the luma values associated with a single line of the image. Thus, if the image includes lines containing 720 pixels, each line buffer has the capacity to store 720 luma values. The filter receives one or more luma components from each line buffer, processes those luma values, and outputs a resulting filtered luma component to be drawn on the display. Once all of the luma components for the four lines of video are filtered, the next four lines of video are then stored in the line buffers. This process is repeated until the entire frame of video has been vertically filtered.
Referring still to FIG. 2, each line buffer requires interfaces to an address bus (ADR), an input data bus (DATA IN), and an output data bus (DATA OUT). Each of the three busses connected to each line buffer includes multiple digital signals. For example, the address bus typically comprises seven bits and each data bus comprises 64 bits. Accordingly, 71 signal "traces" must be routed to each line buffer just for the address and data busses. Other traces are also routed to each line buffer to permit the use of the buffer. The line buffers and filter shown in FIG. 2 typically are implemented inside a semiconductor device (i.e. an "integrated circuit") which includes numerous other functional components.
Semiconductor devices are typically constructed of silicon or other suitable semiconductor material and include tens or hundreds of thousands of microscopically-small transistors implemented in an integrated circuit (IC). Thus, the line buffers 1-4 and filter of FIG. 2 generally are constructed of transistors fabricated from silicon comprising the IC. The address, data and other control signal traces must be routed to each line buffer independently. The relatively large number of traces that must be routed to and between each line buffer leads to routing congestion, and thus the line buffers must be spaced sufficiently apart on the silicon substrate to provide enough room for the traces. As a result, the line buffers and associated traces collectively occupy a considerable surface area in the IC.
It is generally desirable to produce semiconductor devices, in which space is a premium, that incorporate a great deal of functionality in relatively little space. Accordingly, smaller IC's permit more room for other components on a circuit board on which the IC is mounted. Further, smaller IC's generally consume less power than larger devices. The present invention generally relates to an improved vertical filter architecture that can be implemented with smaller semiconductor devices than previously possible.
One possible solution to this space problem involves the use of smaller line buffers (i.e., line buffers that have less memory storage capacity) in the IC. This approach, however, places an increased burden on the address and data busses to transfer more data per unit time to be able to produce output data at the same desired rate. In many filtering operations, a line of pixel data is used more than once. Using smaller buffers may necessitate multiple reads of the same line of data from system memory. Thus, making smaller line buffers helps to reduce the size of the IC, but requires address and data busses that have a higher bandwidth than in conventional devices. Higher data bandwidths undesirably lead to increased temperature generation. Further, simply making the line buffers smaller does not avoid the need to route signal traces to each line buffer from the address and data busses. Accordingly, even with smaller line buffers, the line buffers still must be separated sufficiently to provide clearance for the interconnecting signal traces.
Thus, a video system that includes a vertical filter architecture that solves the problems noted above would be highly beneficial. Such a vertical filter architecture should minimize the surface area required for the filter in the semiconductor device in which it is implemented, while also minimizing the bandwidth required on the address and data busses to transfer the pixel data to and from the buffers. Despite the advantages such a system would offer, to date no such system is known to exist.